Paraskevas Evripidou and Bill Farquhar

The DART processor is designed to be the key building block in real-time multiprocessor systems than can handle multiple "hard" and "soft" real-time processes concurrently. Instruction scheduling is done based not only on data availability but also on priority. The DART multiprocessor supports real-time fault detection and recovery. A Data-Driven checkpoint mechanism is implemented. When the required number of arguments (input tokens) are received at a graph node, that is check pointed, a timer is started. If the required number of output token is not generated upon completion of the timed interval, a fault is assumed and the node is re-scheduled for execution on another processor. The timings are estimated so as to allow the re-scheduled tasks to complete within their hard deadlines.